Ice Lake 10nm Xeon Scalable On Display

One of the more sedate talks at the event was discussing Intel’s approach in the datacenter. We’ve covered this story in detail, especially at Intel’s Data-Centric Summit only a few months ago. Intel has stated that Cascade Lake and Cooper Lake are the next two products for the enterprise market, both built on 14nm, focusing on enhanced security as well as AI instructions to help with acceleration. We also know that after these two Intel will have Ice Lake Scalable built on 10nm, but that’s about it.

To be honest, we don’t actually know much more than what we did back then. Intel confirmed that Ice Lake will be built using Sunny Cove cores. But Intel also showed off what they said was an Ice Lake Xeon 10nm processor and package, as shown in the image above.

Color me skeptical, but what was held up is likely either not ICL-SP or just silicon that doesn’t work. In order to make those products, Intel would have to have pumped out at least one large (350mm2+?) die that worked and then put it into a package with a heatspreader. Intel finally seems to be happy discussing a few products on 10nm, as shown at this event, but all the 10nm hardware is based on tiny 100mm2 or smaller silicon. Given Intel’s documented problems, I would have loved that CPU that was held up in the air to be Ice Lake-SP. But I’ll need to see something more concrete to believe it at this point; it’s too much of a jump.

Ending Intel’s Architecture Day

As I’m writing this, it is 3am PT and only a couple of hours away from Intel’s listed embargo time. The event finished 10 hours ago (a few of us skipped the end event drinks to get to writing) and despite the short time to write it all up, it was a good event overall. For the first time in a good while, Intel decided to talk shop, and in an honest way with very little hand waving. One could argue that in every discussion point, Intel raised more questions than they answered, but the positive here is that questions are being answered, and Intel is willing to share things like roadmaps into 2021, demonstrations of some exciting new products for 2019/2020, and a taste of how they are progressing in both manufacturing and microarchitecture. Hopefully Intel will feel the same and this can become a yearly cadence. The trio of Keller, Koduri, and Murthy, is a strong team to field to the press, and this event fits that bill.

To end this piece, I’m going to put in the Q&A section from day’s presentations, as well as some of the questions put in my particular round-table. It’s an interesting read, and it helps that Jim is full of memorable quotes.

Intel’s First Fovoros and First Hybrid x86 CPU: Core plus Atom in 7 W on 10 nm Intel Made Something Really Funny: Q&A with Raja, Jim, and Murthy
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  • nathanddrews - Wednesday, December 12, 2018 - link

    I know the meme about gaming on Intel graphics, but if they implement Adaptive Sync *combined* with some sort of low framerate compensation, it would make gaming on Intel IGP much less hilarious. Can Intel license FreeSync without using AMD GPU inside? I know FreeSync worked on KLG, but that had an AMD GPU.
  • RarG123 - Wednesday, December 12, 2018 - link

    Like many of AMD's things, FS's an open standard and royalty free. Anyone can use it.
  • Ryan Smith - Wednesday, December 12, 2018 - link

    More specifically, Freesync 1 just AMD's implementation of DisplayPort Adaptive Sync. Intel has to build their own implementation in their display controller and driver stack, but past that all the signaling aspects to the monitor are standardized.
  • Topweasel - Wednesday, December 12, 2018 - link

    Ryan, I thought that was reversed, that AMD worked on adding Adaptive Sync into the specs and worked on making sure it's implementation matched what they were doing with Freesync.
  • kpb321 - Wednesday, December 12, 2018 - link

    IIRC it's a bit of both. Adaptive Sync was present in the eDP standard for things like laptop monitors or tablets as a power saving feature. AMD brought this to the desktop side of things to use for variable framerates in games and helped the standard bring it over too.
  • edzieba - Wednesday, December 12, 2018 - link

    'Adaptive Sync' is effectively the eDP Panel Self Refresh ported over to the full DP spec.
  • drunkenmaster - Wednesday, December 12, 2018 - link

    Freesync utilises adaptive sync. Adaptive Sync is the technology on the screen side, a screen must support adaptive sync to be used by Freesync. Freesync is just the AMD side of it. If a adaptive sync capable screen is detected you can turn on freesync in drivers. Adaptive sync was a standard written up and proposed by AMD and given to I forget who it is now, Displayport group direct or to Vesa. They accepted it and implemented it pretty quickly but as with all things standards take a long time for get integrated into the next cycle or two of products.

    Anyone can use Adaptive sync panels, no one but AMD can use freesync as it's something specific to their hardware and drivers. intel will produce their own specific driver/implementation and just connected to adaptive sync panels in the same way.
  • porcupineLTD - Wednesday, December 12, 2018 - link

    So Intel is going straight to chiplets on interposer, it will be interesting to see if AMD adopts this with Zen 3 or waits until Zen 4. Anyway its nice to see competition doing its job.
  • Alexvrb - Wednesday, December 12, 2018 - link

    We don't know yet exactly how much logic Intel is moving to the interposer. It looks awesome for mobile form factors! I think they will face some challenges to bring it to high-TDP desktop solutions, though.
  • ajc9988 - Wednesday, December 12, 2018 - link

    http://www.eecg.toronto.edu/~enright/micro14-inter... http://www.eecg.toronto.edu/~enright/Kannan_MICRO4... https://youtu.be/G3kGSbWFig4 https://seal.ece.ucsb.edu/sites/seal.ece.ucsb.edu/... https://www.youtube.com/watch?v=d3RVwLa3EmM&t=...

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